Arbetsbeskrivning

ASIC Verification Engineers to our new R&D site in Stockholm At Axis, we have always been about pushing the boundaries in pursuit of innovating for a smarter, safer world. We do this by developing IP-based products and innovations for security and video surveillance. This spring we will open a new R&D Office in Stockholm and we are now looking for ASIC Engineers to build a new ASIC team. Don´t miss the opportunity to be among the first to join our new site! Your future team? The ASIC team in Stockholm will play an important part in the development of future generations of our ARTPEC chips. The team will be involved in the general SoC architecture as well as specification, design and verification of internal IPs. The team will have long term responsibility for parts of the ARTPEC chip and development will be done in close collaboration with the ASIC teams in Lund. See also The history of ARTPEC. Our most important asset is our ability to cooperate. If you are a person that likes to get involved, make a difference, and nudge the world a little bit in the right direction, you will feel at home with us. We have a highly skilled and motivated ASIC team in place in Lund with a good mix of junior and senior team members. Now we are about to expand and strengthen our ASIC verification capabilities in the Stockholm office. Who are we looking for/Who are you? You are curious and have a great passion for technology. You love challenges and enjoy solving them in a team-focused atmosphere. We also believe that you are analytical and enjoy sharing your knowledge and ideas with both senior and junior team members. A suitable background would be a bachelor's or master's degree in electrical engineering, computer science, engineering physics or similar and with at least 5 years previous experience of ASIC development. Required Skills and Experience * SoC level verification, for example software-driven verification, knowledge of interconnect fabrics/protocols, and other typical SoC level IP knowledge * Coverage-driven constrained random verification using SystemVerilog and UVM, on module or sub-system levels * Programming in Python, C, C++/SystemC Bonus points for * Formal verification, e.g. for connectivity checking and formal property verification * Transaction Level Modeling (TLM) * Clock-domain crossing verification * Structured and well skilled in documentation * Understanding of embedded systems and hardware/software interaction We place great emphasis on continuous improvement and work tasks may include investigating new methodologies, participating in study circles and workshops to enhance your skills and spread knowledge. What Axis Communications has to offer This is a unique opportunity to be part of building our new R&D office in Stockholm. On one hand, having the advantages of being a small and agile site while at the same time being part of an exciting, successful organization that is already the world leader in network video. We offer benefits such as flexible working hours, morning fika every day, company bonus, attractive wellness benefits, health insurance - to name a few. Curious to discover more? We have a host of places where you can learn more about Axis, our products, solutions, company culture, and what working at Axis is really like. Check out: Life at Axis blog Engineering at Axis blog Innovation at Axis Ready to Act? We hope you are really inspired by the job description and found a potential match! We are looking forward to receiving your application! If you have any questions, get in touch with Hans Rönne, Engineering Manager for the ASIC Platform team, at +46 46 272 1293. We review applications continuously so don´t wait sending in your application! This recruitment is handled solely by Axis Communications AB, and we politely but firmly decline all calls from recruitment and consulting companies regarding this position.