Arbetsbeskrivning

Veritaz is a leading IT staffing solutions provider in Sweden, committed to advancing individual careers and aiding employers in securing the perfect talent fit. With a proven track record of successful partnerships with top companies, we have rapidly grown our presence in the USA, Europe, and Sweden as a dependable and trusted resource within the IT industry.

Assignment Description:

We are looking for a Senior ASIC Verifier to join our dynamic team.

What you will work on:

• Perform verification of complex ASIC designs, focusing on both new projects and the enhancement of existing ones.
• Utilize UVM and SystemVerilog to verify IP blocks and ensure the integrity of multi-clock domain systems.
• Collaborate closely with the design teams to execute comprehensive verification plans for large FPGA and ASIC projects.
• Engage in IP block verification processes, ensuring high-quality outcomes.

What you bring:

• 6+ years of experience in ASIC verification.
• 2+ years of hands-on experience with UVM methodology.
• Strong expertise in UVM verification and SystemVerilog.
• Proven experience working with complex ASIC and/or large FPGA designs.
• Familiarity with IP block verification and multi-clock domains.
• Proficient English communication skills, both written and spoken.

Meritorious if you have:

• Experience in test bench structuring and design.
• Knowledge of RTL design.
• Scripting skills for test automation.
• Lab experience for hands-on verification tasks.
• Experience in the telecom sector.