Veritaz is a leading IT staffing solutions provider in Sweden, committed to advancing individual careers and aiding employers in securing the perfect talent fit. With a proven track record of successful partnerships with top companies, we have rapidly grown our presence in the USA, Europe, and Sweden as a dependable and trusted resource within the IT industry.

Assignment Description:

We are looking for a Senior ASIC Designer to join our dynamic team.

What You’ll Do:

• Participate in ASIC development projects, working collaboratively in a team environment.
• Design and verify complex ASICs and/or large FPGA systems.
• Handle designs across multiple clock domains.
• Work with SystemVerilog for design and verification tasks.
• Collaborate closely with team members on design and verification processes, ensuring quality and efficiency.

What You Bring:

• Over 5 years of experience in ASIC development.
• Proficiency in working with complex ASIC or large FPGA designs.
• Expertise in multi-clock domain systems.
• Strong knowledge of SystemVerilog for design and verification.
• Excellent English communication skills, both written and spoken.

Meritorious:

• Experience in systemization and architecture design.
• Leadership qualities and the ability to guide and mentor team members.
• Experience with backend work, including timing constraints, timing optimization, and formal verification.
• Knowledge of UVM verification methodology.
• Scripting skills for automation and process improvement.
• Familiarity with Spyglass.
• Previous experience in the telecommunications sector.